04/01/2013
Current Opening:
Requirement 1
Verifiaction:
Experience: 2+ - 8yrs
Languages : Specam, Verilog, System Verilog,Vera,System ‘C’
Locations: USA
Job responsibilities include:
• Writing verification test plans, and then writing tests to execute those plans
• Development of verification collateral, such as checkers or coverage monitors, is often required to enable test plan ex*****on.
• Candidates will need to debug failing tests, then work with designers and architects to resolve bugs
• Successful verification engineers can anticipate failure modes, and write test content to stress the design and identify bugs
• Candidate will analyze coverage gaps and develop strategies to fill coverage holes
• The quality of the design and the final product is directly proportional to the quality of the design verification work.
• Behavioural traits for this position include: Strong problem solving and tolerance of ambiguity.
• Strong discipline and attention to detail in ensuring effective and high quality verification that minimizes bug escapes to higher levels of validation
• Contributing to process improvements where applicable, and gaining domain expertise to be able to independently verify effectively
Requirement 2
we have an urgent requirement for a CAD/EDA Automation Engineer for Bay Area with 2 + years’ experience.
Location: USA
Here are the skills:
Gathers requirements, plans, and implements ASIC design & verification methodologies around industry standard tools. Integrates multiple vendors' tools & databases into common design & verification flows. Unifies HP's ASIC design & verification environment. Installs software & maintains design & verification environment.
Responsible for all stages of ASIC CAD tool development for complex products, solutions, and platforms, including design, development, and testing.
Drives innovation and integration of new technologies into projects and activities in the ASIC CAD Tools organization.
experience with coding in HDL languages such as SystemVerilog
experience with RTL Verification design flows and industry standard EDA tools/flows
experience with Unix operating system and scripting languages (XML, UNIX*, C/C++, Perl, TCL*, C-Shell).